A phase difference detection circuit for detecting a phase difference between two signals is used in phase-locked loop (PLL) circuits and the like in the phase difference detection and phase control of phase difference control feedback (FB) system circuits.
Regarding phase difference detection between signals, detecting a phase difference between signals within a range of −2π (−360 degrees) to +2π (+360 degrees) in PLL circuits is well known (see, for example, Japanese Laid-open Patent Publication No. 2004-120515).
Regarding phase adjustment, controlling a phase shift circuit to detect a dynamic range from the output of a loop filter and controlling the dynamic range of the loop filter output to stay within a certain range is well known. Moreover, when an operating point moves to an end of the dynamic range, resetting to the middle point of the dynamic range is well known (see, for example, Japanese Laid-open Patent Publication No. 09-009285).
However, even if the range of the phase difference detection between signals is set to a wide range of, for example, approximately 0 to 360 degrees, the detected phase difference varies greatly if fluctuation of the detected phase difference occurs in the phase control target. For example, if the detected phase difference varies between +180 degrees and −180 degrees, the level output indicating the detected phase difference will vary greatly. When filtered, a level output with this amount of variation will become a phase difference output approaching the middle level of the output, e.g., a phase difference output with a phase difference of 0 degrees, despite the large variation in the phase difference output. It may be difficult to perform phase control in response to a varying phase difference with the above type of phase difference output.